An insulated-gated field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate to control an underlying surface channel joining a source and a drain. The channel, source and drain are located within a semiconductor substrate, with the source and drain being doped oppositely to the substrate. The gate is separated from the semiconductor substrate by a thin insulating layer such as a gate oxide. The operation of the IGFET involves application of an input voltage to the gate, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
Within a transistor, each of the source and drain meets the substrate underneath the gate at what is known as a junction. In particular, in certain types of field-effect transistors (FET's), the lightly doped source and drain regions meet the substrate underneath the gate at a junction. For example, the substrate may be p-type semiconductor material, while the lightly doped regions may be doped such that they are n-type semiconductor material. The contact between the n-type semiconductor material and the p-type semiconductor material is thus called the p-n junction.
In a p-n junction, electron holes diffuse from the p-region, where their concentration is high, to the n-region, where their concentration is low. The deficit of positively charged holes creates a layer of negatively charged acceptors in the p-region close to the junction. In a similar way, electrons diffuse from the n-region, where their concentration is high, to the p-region where their concentration is low. The deficit of negatively charged electrons creates a layer of positively charged donors in the n-region near the junction.
This charged region, nearly devoid of holes in the p-region and nearly devoid of electrons in the n-region, is called a space charge region, or a depletion region. The charges in the depletion region create a potential barrier that prevents more electrons from coming into the p-region and prevents more holes coming into the n-regions. This potential barrier exists at the p-n junction without any applied bias. The potential difference is caused by different doping of the p and n regions.
Commonly, devices such as microprocessors for personal computers include a plurality of transistors. Desirably, these transistors have shallow depletion regions, or "shallow junctions." Shallow depletion regions provide for lower potential barriers within the transistors, meaning that they may be switched on and off more quickly than transistors having higher potential barriers. Semiconductor transistors, however, typically have large or "high" depletion regions, such that their potential barriers are correspondingly high, meaning that devices in which these transistors are fabricated may not have desirable performance characteristics, especially in terms of speed (clock rate).
This undesirable performance becomes especially disadvantageous and problematic in applications where speed is of the utmost importance, such as in microprocessors. There is a need, therefore, to fabricate transistors having shallow junctions, such that their correspondingly low potential barriers result in high-performance devices incorporating the transistors.